WCET Coverage for Pipelines

Hybrid measurement-based (MB) approaches for computing WCET estimates are gaining popularity due to difficulties modelling advanced microprocessor speed-up features. These approaches combine measured data of program segments by using static analysis techniques in order to reconstruct the longest path through the program. To this end, execution times of program segments are collected by first instrumenting, and then testing, the program. However, the test phase must exercise the WCET between each pair of instrumentation points in order to enable safe re-combination of these data in the calculation stage. In general, exhaustive testing is not permissible, thus coverage criteria are required which give a quantitative view of the quality of the test phase. Often, such criteria within the functional domain, e.g. branch coverage and MC/DC, are insufficient because temporal properties are not considered. This deficiency becomes an issue for advanced mircoprocessors which almost certainly include pipelines and caches, amongst others. In this paper, we introduce the notion of WCET coverage, which are criteria to be integrated into hybrid MB WCET analysis, by focusing on three metrics for programs executing on pipelined processors. Each metric utilises the instrumentation point graph (IPG) a program model typically used in hybrid MB WCET analysis as a measure of coverage. The most straightforward criteria, simple pipeline coverage, covers the pipeline effect on each IPG edge. This is subsumed by pairwise pipeline coverage, which attempts to cover the pipeline effect between adjacent IPG edges. A stronger criteria, pipeline hazard path coverage, utilises properties of the pipeline to identify potential sources of hazards, either structural or data, in the program and maps this information onto the IPG.